I work for an internationally renowned terminal manufacturer and am responsible for the research and development of modem chips.
In the early days of 5G, he was responsible for the development of the terminal data service layer and the core network. Currently, he is leading the research on technical standards for 6G computing power networks.


Blog content mainly revolves around:
  5G/6G Protocol Explanation
Explanation of Computing Power Network (Cloud Computing, Edge Computing, Terminal Computing)
  Advanced C Language Explanation
Explanation of Rust language

Exception levels

The ARMv8-A series defines a series of exception levels, from EL0 to EL3, the meaning of which is explained in detail below:

• In ELn, as n increases, the execution authority of the software also increases accordingly;
• EL0 is called Unprivileged Execute;
• EL2 provides support for virtualization
• EL3 provides a safe state switching function (switching between safe state and non-installation state)

Note that EL0 and EL1 must be implemented, and EL2 and EL3 are optional. Moreover, the EL implemented in a PE may be discontinuous, for example, only EL0, EL1, and EL3 are implemented.

Exception level switching

In the AARCH64 state, exception level switching can only occur inan exception was triggered,orexception handling returnIn the process, where:

• When an exception occurs, the exception level either increases or remains the same;
• When returning from exception handling, the exception level can only decrease or remain the same.

When an exception is about to enter or return from exception handling to another exception level (including the case where the exception level remains unchanged), the exception level to be entered/returned is calledtarget exception level。Each exception level has an explicit target exception level, which is either defined by default or through the corresponding bit of the system register(Note that the target exception level with no exception level is EL0).

Resource usage at different exception levels

When a PE executes at an exception level, the PE can access the following resources:

• the set of resources available for the current exception level and current security state;
• Resources available on all lower exception levels in the current security state.

This means that if EL3 is implemented, then when executing at EL3, the PE can access all resources available on all exception levels (both safe and unsafe).

Common Exception Level Model

Security state

Armv8-A architecture providestwo security states，Each state has an associated physical memory address space,As follows:

• Secure state: In this state, PE can access the physical address space in the secure state and the non-secure state;
• Non-secure state: Only non-secure physical address space can be accessed.

here it isBe kind like waterThanks for reading