The development of STM32 circuit boards must understand the design of the STM32 download and debug circuit, in order to ensure the subsequent download and debugging of the STM32 development board.
The picture below is the standard JTAG/SWD download and debug connector (taken from Micro Snow Electronics):

There are also some manufacturers that only retain the SWD interface. The following picture is a non-standard connector (taken from Hard Rock Technology):

At present, the SWD interface is most commonly used. At work, I also only use the SWD interface. This time the note recording is also based on the theme of SWD.
The SWD interface needs to be used with ST-LINK. The price of ST-LINK is much cheaper than that of J-LINK.

SWD only needs 4 wires to complete the programming and debugging of the program. With ST-LINK, the price is cheap, and it is the best combination for STM32 development at present.
The following picture is taken from the F4 development board of Hard Rock Technology:

There is no problem in applying the circuit in the above picture directly to your own project. However, it is better to understand the following two questions:
1. Why does SWCLK need to be pulled down to GND through a 10K resistor?
2. Why does SWDIO need to be pulled up to 3.3V through a 10K resistor?
Now let's understand the reasons for SWCLK pull-down and SWDIO pull-up.
Refer to "STM32F4xx Chinese Reference Manual" page 1247, Chapter 33-Debugging Support.

As you can see from the picture above,In fact, SWDIO and SWCLK already have pull-ups and pull-downs.。
SWCLK/TCK, there is no special recommendation on the circuit board to pull down further
Next, check page 1251 of "STM32F4xx Chinese Reference Manual":

As you can see from the figure above, ARM officially recommends using a 100k resistor for pull-up on SWDIO. However, most people just use 10k pull-ups. I have tried these two schemes personally, and found no difference.
SWDIO, there is a pull-up inside the chip, but it must be pulled up again on the circuit board (100k or 10k resistance)
SWCLK has been pulled down inside the chip, and there is no special requirement for further pulling down on the circuit board.
After understanding the hardware design of the SWD method, then look at the code configuration (Important)!

As shown in the figure above, Debug needs to select Serial Wire (SWD mode).As for why do I need to configure Serial Wire? The reason is that all GPIO ports of STM32 have multiplexing functions. Among them, PA13 and PA14 have two functions.
As shown in the figure below, PA13 can be JTMS or SWDIO. STM32 defaults to JTAG mode, so PA13 defaults to JTMS, not SWDIO.
In the Debug column, after selecting Serial Wire (SWD mode), PA13 is SWDIO and PA14 is SWCLK. Then PA15, PB3, PB are just ordinary GPIO.

In short, if you choose Serial Wire, it is equivalent to "disable JTAG-DP and enable SW-DP", that is, turn off JTAG and turn on SWD at the same time.
The combination of ST-LINK V2 + SWD is not perfect. There are also some pits, refer to the following URL:
The pit of ST-LINK V2
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