UVM_VER = uvm-1.1
UVM_SUB_VER = d
UVM_HOME = /apps/uvm
VCS = vcs
VCS_OPTS = -sverilog +acc +vpi -timescale=1ns/1ns $(EXTRA_VCS_OPTS)
.PHONY: clean vcs vcs_debug vcs_std
default:
# To use with VCS, enter:
# make vcs or make vcs_debug
# To remove temporary files, enter
# make clean
vcs:
$(VCS) $(VCS_OPTS) -ntb_opts uvm $(INCDIRS) $(SRCS) -R $(EXTRA_VCS_RUNOPTS)
vcs_debug:
$(VCS) $(VCS_OPTS) -ntb_opts uvm $(INCDIRS) $(SRCS) -R -gui $(EXTRA_VCS_RUNOPTS)
vcs_std:
$(VCS) $(VCS_OPTS) +acc +vpi $(INCDIRS) +incdir+$(UVM_HOME)/src $(UVM_HOME)/src/uvm.sv $(SRCS) \
$(UVM_HOME)/src/dpi/uvm_dpi.cc -CFLAGS -DVCS -R $(EXTRA_VCS_RUNOPTS)
clean:
@echo cleaning old simulation files and libraries...
@ -$(RM) csrc simv* work *.bak *.log *.vpd transcript \
waves.shm *.wlf mylib lib *.vstf .restart* \
urgReport *.so vc_hdrs.h
# EOF
Another one has an error
///////////////////////////////////////////
UVM_REGISTER ?= ../../../../uvm_register-2.0
RTL ?= ../../../rtl
AGENTS ?= ../../../agents
TAR_PATH ?= ../../../../
TEST ?= spi_interrupt_test
all: build run
build:
vcs -timescale=1ns/10ps -sverilog -ntb_opts uvm-1.1 +incdir+$(RTL)/spi/rtl/verilog $(RTL)/spi/rtl/verilog/*.v \
+incdir+$(UVM_REGISTER)/src $(UVM_REGISTER)/src/uvm_register_pkg.sv \
+incdir+$(AGENTS)/register_layering $(AGENTS)/register_layering/register_layering_pkg.sv \
+incdir+$(AGENTS)/apb_agent $(AGENTS)/apb_agent/apb_agent_pkg.sv \
+incdir+$(AGENTS)/spi_agent $(AGENTS)/spi_agent/spi_agent_pkg.sv \
+incdir+../register_model ../register_model/spi_register_pkg.sv \
$(AGENTS)/apb_agent/apb_if.sv \
$(AGENTS)/spi_agent/spi_if.sv \
../tb/intr_if.sv \
+incdir+../env ../env/spi_env_pkg.sv \
+incdir+../sequences ../sequences/spi_bus_sequence_lib_pkg.sv \
+incdir+../sequences ../sequences/spi_sequence_lib_pkg.sv \
+incdir+../sequences ../sequences/spi_virtual_seq_lib_pkg.sv \
+incdir+../test ../test/spi_test_lib_pkg.sv \
+incdir+$(RTL)/spi/rtl/verilog ../tb/top_tb.sv
run:
./simv top_tb +UVM_TESTNAME="$(TEST)"
clean:
@rm -rf csrc
@find ../../../ -name "*~" -delete
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